Integrated circuit devices, such as integrated circuit memory devices and integrated circuit logic devices, are widely used in consumer and commercial applications. As the integration densities of these integrated circuits continue to increase, the number of internal data paths in the integrated circuit also generally continues to increase. The data path width also generally reflects the number of data input/output channels, referred to as "DQ" channels.
In simple integrated circuits, "x1" products having one-DQ were used. These were followed by "x4" and "x8" products having four and eight bit wide data paths, respectively. In the current state of the art, byte-wide "x16" products are also widely used. In the future, the number of DQ channels may be expected to increase further.
Recently, Merged Memory and Logic (MML) integrated circuits have been developed. MML integrated circuits generally include a large capacity memory and a large logic block that are merged in one integrated circuit. Thus, an MML integrated circuit can replace discrete memory and logic chips that are used in personal computers and other consumer and commercial devices.
In an MML integrated circuit, in order to provide effective communications between the large memory block and the large logic block, a large number of internal data paths may be provided. For example, 256 or more internal data paths may be provided.
The large number of data paths that are used in state-of-the-art integrated circuits may present a problem during testing of the integrated circuits. For example, in testing, multiple integrated circuits are often tested by test equipment simultaneously. The test equipment generally includes a fixed number of DQ channels and test pins, for reading data from and writing data into integrated circuit devices that are being tested. Thus, when the integrated circuit memory device has a large data path width, the number of integrated circuit devices that can be tested simultaneously may be reduced.
In order to increase the number of integrated circuit devices that can be tested simultaneously, a reduced DQ scheme can be used in which an integrated circuit device can be tested using a reduced data path width. For example, an x16 device can be tested in an x4 mode. Alternatively, a Merged DQ (MDQ) technique can be used in which several internal DQs are merged onto one input/output pad.
A conventional MDQ technique will now be described. In one important test of a memory device, a first logic value such as ZERO is written into all of the memory cells. All of the memory cells are then read to determine that all ZEROs were stored. Then, a second logic value such as ONE is written into all the memory cells and read from the memory cells to determine that ONE was stored. High density integrated circuit memory devices and MML devices often provide built-in testing circuits. Thus, comparators may be provided in the integrated circuit to compare data read from the memory cells in order to determine whether all ONEs or all ZEROs were properly written and read. Then, an indication may be provided on a single input/output pad as to whether all ZEROs were properly written and read and all ONEs were properly written and read. Thus, an MDQ technique is provided.
In order to provide this built-in test circuitry, multiple comparators are used to compare the data on the data paths in the integrated circuit. The multiple comparators can thus merge the data on multiple data paths into a single output, for the MDQ technique.
Unfortunately, as the number of internal data paths increase, the number of comparators may also increase prohibitively. For example, in an MML integrated circuit, which can include up to 256 or more internal data paths and up to 8 or more external data paths, up to 32 or more internal data paths may be merged into each output DQ pad. Thus, up to 32 or more internal DQs are compared with one another. This may use 31 one-bit comparators for each group of 32 internal DQs. Thus, up to 248 or more one-bit comparators may be used in the MML integrated circuit. The area and complexity of this MDQ circuit may therefore become prohibitively large.